Very high frequency, mechanically flexible and performance stable integrated electronics based on SOI-CMOS transfer bonding on plastic substrates.

The ability to realize flexible circuits integrating sensing, signal processing, and communicating capabilities is of central importance for the development of numerous nomadic applications requiring foldable, stretchable and large area electronics. A large number of these applications currently rely on organic electronics, or integrate high mobility active films on plastic foils to provide higher performance. A key challenge is however the combination of high electrical performance (i.e. millimeter wave, low noise electronics), with the mechanical flexibility required to adapt to curvilinear surfaces, in addition to high stability of these electrical performance upon deformation.

In this work, a solution has been developed, based on thinning and transfer onto plastic foil of high frequency (HF) CMOS devices initially patterned on conventional silicon-on-insulator (SOI) wafers.

This process enables the fabrication of high performance electronics on plastic, with n-MOSFETs featuring characteristic frequencies f_T/f_max as high as 150/160GHz in addition to low noise potentialities: NF_min/G_a of 0.57/17.8dB.

Secondly, by locating the neutral plane of the flexible system in its active layer, the relative variation of these high frequency figures-of-merit can be limited to 5% even after aggressive bending, demonstrating mechanical flexibility, high electrical performance and stability upon deformation.

This activity aims at exploring two unorthodox tracks towards a drastic reduction of heat transfer and a significant increase of thermoelectric conversion. It is funded in the frame of an European Research Council Starting Grant (n°338179) awarded to J.-F. Robillard in 2013.

Follow this project on : https://www.researchgate.net/project/Unconventional-Principles-of-ThermoElectric-Generation

Abstract

The performance of thermoelectric generation has long since been limited by the fact that it depends on hardly tunable intrinsic materials properties. At the heart of this problem lies a trade-off between sufficient Seebeck coefficient, good electrical properties and suitably low thermal conductivity. The two last being closely related by the ambivalent role of electrons in the conduction of both electrical and thermal currents. Current research focuses on materials composition and structural properties in order to improve this trade-off also known as the figure of merit (zT). Recently, evidences aroused that nanoscale structuration (nanowires, quantum dots, thin-films) can improve zT by means of electron and/or phonon confinement. The aim of this project is to tackle the intrinsic reasons for this low efficiency and bring TE conversion to efficiencies above 10% by exploring two unconventional and complementary approaches:

Phononic Engineering Conversion consists of modulating thermal properties by means of a periodic, precisely designed, arrangement of inclusions on a length scale that compares to phonon means free path. This process is unlocked by state of the art lithography techniques. In its principles, phononic engineering offers an opportunity to tailor the phonon density of states as well as to artificially introduce thermal anisotropy in a semiconductor membrane. Suitable converter architecture is proposed that takes advantage of conductivity reduction and anisotropy to guide and converter heat flow. This approach is fully compatible with standard silicon technologies and is potentially applicable to conformable converters.

The Micro Thermionic Conversion relies on low work function materials and micron scale vacuum gaps to collect a thermally activated current across a virtually zero heat conduction device. This approach, though more risky, envisions devices with equivalent zT around 10 which is far above what can be expected from solid state conversion.