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THESE CHANUEL A. « Transistor GaN sur Si compatible CMOS pour l‘amplification de puissance en bande Ka: optimisation de l’empilement de grille « 

A. CHANUEL

Le 13 décembre 2022

Thèse de doctorat en Electronique, microélectronique, nanoélectronique et micro-ondes, Université de Lille, ENGSYS Sciences de l’ingénierie et des systèmes,

Summary:

La brique de grille des transistors GaN nécessite un dimensionnement plus compact avec une longueur plus courte (Lg~150 nm) et une barrière plus fine (<10 nm) pour le fonctionnement en bande Ka (~30 GHz). De plus, la compatibilité de fabrication avec les technologies CMOS implique de modifier les techniques de fabrications et les métallisations sans dégrader les performances. Après avoir rappelé les enjeux du développement des technologies GaN/Si compatibles CMOS autour de 30 GHz, le procédé de fabrication des premiers transistors GaN sur substrat silicium 200 mm pour les applications radiofréquence développé au CEA Leti est présenté. L’influence des procédés de fabrications sur les performances électriques est ensuite étudiée en comparant plusieurs plaques démontrant des résultats d’amplification encourageants (PAE=40 % and Pout=2,4 W/mm à 30 GHz). Une analyse des facteurs limitant le fonctionnement en fréquence du transistor est ensuite menée à l’aide de caractérisations petit-signal réalisées à l’IEMN. Finalement, des aspects préliminaires sur la fiabilité des composants sont abordés en observant les variations des performances électriques après des recuits successifs ainsi qu’en extrayant la résistance thermique de deux empilements GaN/Si.

Abstract:

The gate brick of GaN transistors requires a more compact design with a shorter length (Lg~150 nm) and a thinner barrier (<10 nm) for Ka-band operation (~30 GHz). Moreover, manufacturing compatibility with CMOS technologies implies modifying manufacturing techniques and metallizations without degrading performance. After recalling the challenges of developing CMOS-compatible GaN/Si technologies around 30 GHz, the fabrication process of the first GaN transistors on a 200 mm silicon substrate for radio frequency applications developed at CEA Leti is presented. The influence of the fabrication process on the electrical performance is then studied by comparing several wafers showing encouraging amplification results (PAE=40% and Pout=2.4 W/mm at 30 GHz). An analysis of the factors limiting the frequency operation of the transistor is then conducted using small-signal characterizations performed at IEMN. Finally, preliminary aspects on the reliability of the components are addressed by observing the variations of the electrical performances after successive annealing and by extracting the thermal resistance of two GaN/Si stacks.

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