Alexis GAUTHIER
Thesis defence
07/05/2019
IEMN Amphitheatre
Summary:
The work presented in this thesis concerns the development and optimisation of bipolar transistors for future generations of BiCMOS technologies. The reference technology is BiCMOS055 with fT and fMAX of 320 and 370 GHz respectively. Firstly, it is shown that by optimising the vertical profile, including the thermal budget, the base profile and the collector profile in particular, it is possible to achieve an fT of 400 GHz while remaining compatible with CMOS transistors. Secondly, the development of an implanted collector is presented. The co-implantation of carbon with phosphorus makes it possible to obtain defect-free substrates, precise diffusion control and promising electrical performance. In particular, a record fT transition frequency of 450 GHz is achieved thanks to optimised design rules. A shallow STI (SSTI) module is being developed to compensate for the increase in base/collector capacitance associated with this type of technology. Thirdly, the integration on silicon of a new bipolar transistor architecture designed to overcome the limitations of the DPSA-SEG used in BiCMOS055 is detailed and the initial results are discussed. This section demonstrates all the difficulties involved in integrating a new-generation bipolar transistor into a CMOS platform. The functionality of the emitter/base architecture is demonstrated using dc measurements. Finally, the possibility of 28nm integration is evaluated through specific work, in particular at the level of SOI implantations, and an opening on possible 3D integrations is made.
Abstract:
The studies presented in this thesis deal with the development and the optimization of bipolar transistors for next BiCMOS technologies generations. The BiCMOS055 technology is used as the reference with 320 GHz fT and 370 GHz fMAX performances. Firstly, it is showed that the vertical profile optimization, including thermal budget, base and collector profiles allows to reach 400 GHz fT HBT while keeping CMOS compatibility. In a second time, a fully implanted collector is presented. Phosphorous-carbon co-implantation leads to defect-free substrate, precise dopants profile control and promising electrical performances. A new 450 GHz fT record is set thanks to optimized design rules. A low-depth STI module (SSTI) is developed to limit the base / collector capacitance increase linked to this type of technology. In a third time, the silicon integration of a new bipolar transistor architecture is detailed with the aim of overcoming DPSA-SEG architecture limitations used in BiCMOS055 and first electrical results are discussed. This part shows the challenges of the integration of new-generation bipolar transistors in a CMOS platform. The functionality of the emitter / base architecture is demonstrated through dc measurements. Eventually, the feasibility of 28-nm integration is evaluated with specific experiments, especially about implantations through the SOI, and an overview of potential 3D-integrations is presented.
JURY :
- Christophe GAQUIERE, University of Lille, Thesis supervisor
- Christelle AUPETIT-BERTHELEMOT, Xlim, Examiner
- Jean-Luc MURARO, Thales, Examiner
- Pascal CHEVALIER, STMICROELECTRONICS, Examiner
- Thomas ZIMMER, University of Bordeaux, Rapporteur
- Philippe FERRARI, University of Grenoble-Alpes, Rapporteur