Speaker : Alain Cappy (IEMN)
Date : 17 January at 11h00
Location : Amphiteather IEMN-LCI
Traditional computing technology based on the Von Neumann architecture is facing fundamental limits in the context of the end of Moore’s law. Among them is a poor energy efficiency. This situation motivates the use of different processing information paradigms, such as the use of spiking neural networks (SNNs), which also introduce cognitive characteristics. In this context, this talk presents the design of an original artificial neuron (AN) in standard 65nm CMOS technology, optimized for energy efficiency. The main features of the fabricated ANs are: (i) an energy efficiency of few fJ/spike, that is, between 2 to 3 orders of magnitude lower than the current state-of-the-art, (ii) a standby power, obtained when the neuron remains at rest, not exceeding 10s of pW (iii) a silicon consumption area between 35 and 200 µm2, (iv) a spiking frequency able to reach 10s of kHz, a useful feature within a biocomputing context. The performance level, achieved in standard 65 nm CMOS technology, can address various contexts such as highly integrated neuro-processors for robotics, neuroscience or medical applications.